include(/media/Datos/Facultad/Latex/circuit_macros/pgf.m4)
include(/media/Datos/Facultad/Latex/circuit_macros/libcct.m4)
   
.PS 
cct_init
  
elen = 0.75
Origin: Here
	source(up_ elen,AC); llabel(-, v_{s},+); 
	resistor(right_ elen); rlabel(, R_{s},)
	{ 
		capacitor(down_ elen); llabel(, C,); ground
	}
	line right_ elen*0.6
	{
		inductor(down_ elen); llabel(, L,);
	}
	line right_ elen*0.3; up_
	JFET:j_fet(,,P,) with .G at Here ; rlabel(,T_1,);
	line down_ 0.08 from JFET.S; 
	{
		line right_ elen*0.6;
		capacitor(down_ elen*0.9); llabel(,C_E,)
		line left_ elen*0.6;
	}
	resistor(down_ elen*0.9); llabel(,R_E,)
	line to Origin
	line left_ elen*0.7
	battery(up_ elen*2.3); rlabel(,12~V,);
	line right_ elen*3.07
	{
		line right_ elen*1.23
		resistor(down_ elen*0.84); llabel(,R_C,);
		{
			line right_ elen*0.2
			diode(right_ elen); rlabel(,D_1,);
			{
				resistor(down_ elen*1.465); llabel(,R_{int});
			}
			line right_ elen*0.6
			{
				capacitor(down_ elen*1.465); llabel(,C_{int});
			}
			resistor(right_ elen*0.8); rlabel(,R_{lp},);	
			{
				capacitor(down_ elen*1.465); llabel(,C_{lp},);
				line left_ elen*2.2
			}
			#Pongo la última etapa desde acá, con el opamp
			capacitor(right_ elen*0.8); rlabel(,C_{ac},);
			#resistor(down_ elen*0.734); llabel(,R_{f_1},);
			POT:potentiometer(down_ elen*1.465) with .Start at Here; rlabel(,R_{p},);
			{
				line right_ elen*0.6
				right_;
				LM: opamp with .In2 at Here; 
				line left_ elen*0.3 from LM.In1
				line up_ elen*0.5; ground(,,,90);
				line up_ elen*0.01 from LM.E1; 
				dot; rlabel(,1,)
				resistor(up_ elen*0.8); llabel(,R_{av},);
				line right_ elen*0.25;
				capacitor(down_ elen*0.93); llabel(,C_{av},); 
				dot; llabel(,8,);
				line right_ elen*0.1 at LM.Out; dot; llabel(,5,);
				{
					capacitor(down_ elen*0.6); rlabel(,C_{out_1},);
					resistor(down_ elen*0.6); rlabel(,R_{out},);
					ground;
				}
				capacitor(right_ elen*0.8); rlabel(,C_{out_2},);
				resistor(down_ elen); llabel(,R_{L},);
				ground;
			}
			#resistor(down_ elen*0.734); llabel(,R_{f_2},);
			line left_ elen*0.8 from POT.End
		}
	}
	resistor(down_ elen*1.033); llabel(,R_D,);
	
	line right_ elen*0.8; up_ 
	TBJ: bi_tr(,) with .B at Here; rlabel(,T_2,)
	line down_ 0.08 from TBJ.E;
	{
		line right_ elen*0.6;
		capacitor(down_ elen*0.967); llabel(,C_E,);
		line left_ elen*0.6
	}
	resistor(down_ elen*0.967); llabel(,R_E,);
	line left_ elen*0.65
	
.PE




